Advice on python generated PCB layouts

Hi.

I’m building a device with a touchpad. I need a grid of pads connected as rows and columns. Rather than laboriously lay them all out by hand I wrote a python script to generate the PCB layout. It works fine. I have square copper pour electrodes connected horizontally and vertically by traces. The python script takes the various options as parameters, x & y size in mm, number of rows and columns, electrode spacing, etc.

Currently I am writing this directly to a separate .kicad_pcb file by running the python command in a KiCAD terminal. I can then open that file and copy and paste the PCB layout into my project that contains the rest of my circuit and ICs.

In the .kicad_pcb file I am labeling the nets for the rows and columns “R1, R2, R3” & “C1, C2, C3” etc (yes, I know, I’ll switch to using ROW1, ROW2, COL1, COL2 :blush:)

In the main circuit the nets coming from the touchpad IC are also labelled R1, R2, C1, C2.

But when I cut and paste by PCB grid into the circuit, the PCB grid is not connected to the nets. I guess they are being reset?

I have to manually select every electrode, and traces in the grid and reassign it to the correct net. C1, C2, etc. which is a pain.

Is there a better way for me to generate the PCB layout than create the PCB layout and paste it in to the project while keeping the net assignments?

I don’t think I want to generate a symbol and footprint from Python, as that’s a bit more complex. I like the simplicity of just generating the PCB layout of a particular size, shape and grid pattern and pasting it in, but I need to find a better way to match the nets ?

Any advice welcomed.

Thanks.

Jon.

(and yes, I’ll put the Python script on GitHub once its finished)

Even if you give “unconnected copper” a net name, when a pad of a footprint is put on top of it, then it automatically changes to the net name of the pad to which it’s now attached.

For the net names… For local labels, KiCad uses the full path name (in a hierarchical schematic) for the net name. For local labels on the root sheet, this means that a slash is inserted before the net name. So carefully compare the net names in the PCB editor.

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Switching the labels to /ROW1 rather than ROW1 fixed it ! Thanks! :slight_smile:

Python Script is here, if its helpful for anyone … improvements / comments welcomed.

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